
{"id":2923,"date":"2010-07-12T21:35:57","date_gmt":"2010-07-12T16:05:57","guid":{"rendered":"http:\/\/www.jeffrin.in\/?p=1988"},"modified":"2010-07-12T21:35:57","modified_gmt":"2010-07-12T16:05:57","slug":"modify-all-segment-registers-except-cs","status":"publish","type":"post","link":"https:\/\/www.trueangle.org\/index.php\/2010\/07\/12\/modify-all-segment-registers-except-cs\/","title":{"rendered":"modify all segment registers except ..(CS)"},"content":{"rendered":"<h3> software | Windows | <\/h3>\n<pre>\n<a href=\"http:\/\/www.jeffrin.in\/wp-content\/uploads\/2010\/07\/cs.png\"><img decoding=\"async\" loading=\"lazy\" src=\"http:\/\/www.jeffrin.in\/wp-content\/uploads\/2010\/07\/cs.png\" alt=\"\" title=\"cs\" width=\"165\" height=\"168\" class=\"aligncenter size-full wp-image-1989\" \/><\/a>\n<\/pre>\n<pre>\nIn computing, a code segment, also known as a text segment or simply\nas text, is a phrase used to refer to a portion of memory or of an\nobject file that contains executable instructions.\n\nsource :\nhttp:\/\/en.wikipedia.org\/wiki\/Code_segment\n\nNote that code may always modify all segment registers except CS (the\n code segment). This is because the current privilege level (CPL) of the\n processor is stored in the lower 2 bits of the CS register. The only way\n to raise the processor privilege level (and reload CS) is through the\n lcall (far call) and int (interrupt) instructions. Similarly, the only way to\n lower the privilege level (and reload CS) is through lret (far return) and\n iret (interrupt return).\n\nsource :\nhttp:\/\/en.wikipedia.org\/wiki\/X86_memory_segmentation\n\n<\/pre>\n<h3> software | GNU\/Linux | <\/h3>\n<pre>\n(gdb) info registers\nrax            0xfffffffffffffdfc\t-516\nrbx            0x5dc\t1500\nrcx            0xffffffffffffffff\t-1\nrdx            0x5dc\t1500\nrsi            0x1\t1\nrdi            0x7fff6f396d50\t140735059422544\nrbp            0xb4a160\t0xb4a160\nrsp            0x7fff6f396d00\t0x7fff6f396d00\nr8             0x0\t0\nr9             0xffffffff\t4294967295\nr10            0x8\t8\nr11            0x246\t582\nr12            0x7fff6f396d50\t140735059422544\nr13            0x7fff6f396d60\t140735059422560\nr14            0x0\t0\nr15            0x1\t1\nrip            0x7fc4561ec0c8\t0x7fc4561ec0c8 \neflags         0x246\t[ PF ZF IF ]\ncs             0x33\t51\nss             0x2b\t43\nds             0x0\t0\nes             0x0\t0\nfs             0x0\t0\ngs             0x0\t0\n(gdb)\n\n<h4> cs             0x33\t51 <\/h4>\n<\/pre>\n<pre>\nRegister operands are always prefixes with `%'. The 80386 registers\n consist of the 6 section registers `%cs' (code section), `%ds' (data\n section), `%ss' (stack section), `%es', `%fs', and `%gs'.\n\nsource :\nhttp:\/\/www.cs.utah.edu\/dept\/old\/texinfo\/as\/as.html#SEC152\n<\/pre>\n<h3> | Related Discussion | <\/h3>\n<pre>\nCS Register Setting by VnutZ :: NR10 :: Show\nThe article correctly mentions the importance of setting up segment\n registers, yet like most neglects to set up CS (which is 0\u00d70000). This is\n one nasty latent bug that shows itself as soon as you try doing indirect\n jumps. So if you want to use something like threaded code in your first\n stage bootloader set CS by \"jmp 0\u00d707c0:foo\" first.\n\n\nYou\u2019re right \u2013 it would have been \"good practice\" to set the CS register.\n However, the CS register is already correctly set by the BIOS. If it\n were not set \u2026 a computer would never boot up! CS (code segment)\n and IP (instruction pointer) are both set to point directly at 0000:7C00\n which is where the BIOS loads the bootsector into.\n\nsource:\nhttp:\/\/www.omninerd.com\/comments\/10807\n<\/pre>\n<h3> | Variation | <\/h3>\n<pre>\n\nThe way to execute user processes in kernel mode in AMD64 is almost\nthe same as it is in IA-32. To execute user processes in kernel mode,\n the only thing KML does is launch user processes with the CS segment\n register, which points to the kernel code segment instead of user code\n segment.\n\n\nIn AMD64 CPUs, the privilege level of running programs is determined by\n the privilege level of their code segment. This is almost the same as in\n IA-32 CPUs; the only difference is the segmentation memory system is\n degenerated in AMD64. Although segment registers still are used in 64\n-bit mode of AMD64, the only segment that the segment registers can\n use is the 16 EB flat segment. Thus, the role of the segment\n descriptors is simply to specify privilege levels. Therefore, only four\n segments\u2014kernel code segment, kernel data segment, user code\n segment\u2014exist in 64-bit mode.\n\nsource and link(s) :\nhttp:\/\/www.linuxjournal.com\/article\/8023?page=0,1\nhttp:\/\/www.thefreedictionary.com\/degenerated\n<\/pre>\n","protected":false},"excerpt":{"rendered":"<p>software | Windows | In computing, a code segment, also known as a text segment or simply as text, is a phrase used to refer to a portion of memory or of an object file that contains executable instructions. source : http:\/\/en.wikipedia.org\/wiki\/Code_segment Note that code may always modify all segment registers except CS (the code &hellip; <\/p>\n<p class=\"link-more\"><a href=\"https:\/\/www.trueangle.org\/index.php\/2010\/07\/12\/modify-all-segment-registers-except-cs\/\" class=\"more-link\">Continue reading<span class=\"screen-reader-text\"> &#8220;modify all segment registers except ..(CS)&#8221;<\/span><\/a><\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"closed","ping_status":"open","sticky":false,"template":"","format":"standard","meta":[],"categories":[1],"tags":[552,604,1427,1680],"_links":{"self":[{"href":"https:\/\/www.trueangle.org\/index.php\/wp-json\/wp\/v2\/posts\/2923"}],"collection":[{"href":"https:\/\/www.trueangle.org\/index.php\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.trueangle.org\/index.php\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.trueangle.org\/index.php\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/www.trueangle.org\/index.php\/wp-json\/wp\/v2\/comments?post=2923"}],"version-history":[{"count":0,"href":"https:\/\/www.trueangle.org\/index.php\/wp-json\/wp\/v2\/posts\/2923\/revisions"}],"wp:attachment":[{"href":"https:\/\/www.trueangle.org\/index.php\/wp-json\/wp\/v2\/media?parent=2923"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.trueangle.org\/index.php\/wp-json\/wp\/v2\/categories?post=2923"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.trueangle.org\/index.php\/wp-json\/wp\/v2\/tags?post=2923"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}