1. mca_disable_dma – channel to disable DMA on<\/p>\n
\nvoid mca_disable_dma(unsigned int dmanr);\ndmanr DMA channel\n<\/pre>\n\n2. Classroom<\/p>\n
\nFirst of all, DMA (per se) is almost entirely obsolete. As\noriginally defined, DMA controllers depended on thefact that the\nbus had separate lines to assert for memory read\/write, and I\/O\nread\/write. The DMA controller took advantage of that by asserting\nboth a memory read and I\/O write (or vice versa) at the same\ntime. The DMA controller then generated successive addresses on the\nbus, and data was read from memory and written to an output port\n(or vice versa) each bus cycle.\n\nThe PCI bus, however, does not have separate lines for memory\nread\/write and I\/O read\/write. Instead, it encodes one (and only\none) command for any given transaction. Instead of using DMA, PCI\nnormally does bus-masteringtransfers. This means instead of a DMA\ncontroller that transfers memory between the I\/O device and memory,\nthe I\/O device itself transfers data directly to or from memory.\n\nAs for what else the CPU can do at the time, it all depends. Back\nwhen DMA was common, the answer was usually \"not much\" -- for\nexample, under early versions of Windows, reading or writing a\nfloppy disk (which did use the DMA controller) pretty much locked\nup the system for the duration.\n\nNowadays, however, the memory typically has considerably greater\nbandwidth than the I\/O bus, so even while a peripheral is reading\nor writing memory, there's usually a fair amount of bandwidth left\nover for the CPU to use. In addition, a modern CPU typically has a\nfair large cache, so it can often execute some instruction without\nusing main memory at all.\n\nsource : http:\/\/stackoverflow.com\/questions\/5150719\/direct-memory-access-dma-how-does-it-work\n<\/pre>\n","protected":false},"excerpt":{"rendered":"1. mca_disable_dma – channel to disable DMA on void mca_disable_dma(unsigned int dmanr); dmanr DMA channel 2. Classroom First of all, DMA (per se) is almost entirely obsolete. As originally defined, DMA controllers depended on thefact that the bus had separate lines to assert for memory read\/write, and I\/O read\/write. The DMA controller took advantage of … <\/p>\n